Designing Logic Circuits with VHDL



The aim of this article is to provide a brief introduction to logic circuits and some popular tools for designing and testing them. It includes a short example of how to run some VHDL (VHSIC Hardware Description Language) code using an online tool.

What is a Logic Circuit?

Logic circuits can be thought of as the lowest level of computer architecture. They are the parts of your computer responsible for processing the zeros and ones in the machine code that make up your software. At the basic level, logic circuits are simply logic gates — AND gates, OR gates and NOT gates. These gates can be combined to perform higher-level functions like XOR (exclusive OR), or even shift registers and random-access memory (RAM). The increase in the popularity of machine learning has also given rise to special hardware like tensor processing units (TPUs) and the Intel Movidius stick which are also composed of low logic circuits.

Logic circuits are either stateless or state-dependent, which means that the output of some logic circuits only depends on the inputs provided, while other logic circuits have memory — that is, their behaviour is affected by the order of inputs provided because they each input changes to their state. A simple example of a stateless logic circuit is the AND gate. It takes two inputs and provides one output, and the output only depends on the input provided at a given time. Other basic logic gates also behave the same way. The image shows some logic gates and their truth tables. You can see from the truth tables that the output is only dependent on the input.


As mentioned above, state-dependent logic circuits have memory, and their output depends on the sequence of inputs provided. A simple example of a state-dependent circuit is a T-flip-flop. This flip-flop is also known as the toggle flip-flop because it’s able to toggle its state (memory) based on the input. Below is an image of the T-flip-flop and its truth table.




In the truth table above, Q refers to the state of the flip-flop before the input T was applied, and Q(t+1) is the state of the flip-flop after the input T was applied.

What is VHDL?

Considering how important these hardware designs are, it is important to have efficient tools for designing and testing them (usually on an FPGA) before the first prototype is produced. One such tool is the VHSIC Hardware Description Language (VHDL); VHSIC stands for Very High Speed Integrated Circuit. This language, like most programming languages, can be used on a number of IDEs, depending on the features you want, and what you are willing to pay. One important thing to note is that some IDEs provide syntax highlighting for VHDL, but running/simulating the code requires a special compiler.

Below is a list of paid software that allows you to simulate your VHDL code:

There are also some free versions, such as:

Feel free to try out the different options to find what works best for you.

Next, we’ll look at how to simulate VHDL code with EDA Playground.


First, head to the EDA website, click on “Log In” and click “Register” to register for an EDA account. Next, verify your email address and log in to your account to access all the features of the EDA Playground. You can now write some VHDL code and run it as a simulation; however, we will be running one of the examples provided by the online tool instead of writing code from scratch.

To do this, click on “Examples” in the pane on the left of your screen, and click VHDL to see the VHDL examples. Next, click “VHDL – Basic OR Gate” to access the OR gate example. That this generates two code samples, called testbench.vhd and design.vhd. Using an analogy, you can consider design.vhd as some code for an application and testbench.vhd as the test cases for said application. This allows you to create a design and test how it behaves under specific conditions. You can now click on “Run” to compile the code and run the tests. Feel free to take a closer look at the code and try figuring out what it does.


VHDL is a powerful language for designing and testing hardware designs without manufactured components, thereby reducing cost. It also provides a workflow similar to standard software development by allowing the use of test cases, making it ideal for iterative design processes.

Stephan is a third-year student at Ashesi pursuing an undergraduate degree in computer engineering. Stephan is passionate about technology and is focused on continuous learning to gain new skills. He has worked in software development, and has worked on IoT projects and designing products for the health sector.


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